- 您现在的位置：买卖IC网 > Sheet目录1252 > VTERB-DECO-XP-N1 (Lattice Semiconductor Corporation)IP CORE VITERBI DECODER XPGA
Lattice Semiconductor
Viterbi Decoder User’s Guide
Introduction
Lattice’s Viterbi Decoder core is a parameterizable core for decoding different combinations of convolutionally
encoded sequences. The decoder core supports various code rates, constraint lengths and generator polynomials.
The core also supports soft-decision decoding and is capable of decoding punctured codes. The architectural
details of the core are given in the next section.
Viterbi Decoder Basics
Viterbi decoding is an ef?cient algorithm for decoding convolutionally encoded sequences. In the decoder, the con-
volutional coded sequences, corrupted by channel noise, are decoded back to the original sequence. A digital
transmit-receive system is shown in Figure 1, which uses a Viterbi decoder for decoding the convolutionally coded
data. The digital data stream (e.g., voice, image or any packetized data) is ?rst convolutionally encoded, modulated
and transmitted through a wired or wireless channel. The channel noise is symbolically denoted by a “noise” block
added to the channel. The data received from the channel at the receiver side is ?rst demodulated and then
decoded using the Viterbi decoder. The decoded output is equivalent to the transmitted digital data stream.
Figure 1. Digital Transmit-Receive System
Transmitted
Data Stream
Convolutional
Encoder
Modulator
Channel
Demodulator
Viterbi
Decoder
Received
Data Stream
Noise
Convolutional Encoding
Convolutional encoding can be considered as a series of state transitions for every input symbol. The input and the
resulting state transition can be shown in a special state transition diagram called a “trellis tree” (Figure 2).
Figure 2. Trellis Tree
00
01
10
11
0/00
1/00
0/01
1/01
0/10
1/10
0/11
1/11
0/00
1/00
0/01
1/01
0/10
1/10
0/11
1/11
0/00
1/00
0/01
1/01
0/10
1/10
0/11
1/11
Trellis for 3 stages and constraint length = 3
Branches corresponding to input seq. 101 is highlighted
In the above trellis, the branches for three transitions are drawn. The path of the trellis for a typical input sequence,
101, is highlighted in the ?gure. Any transmission error alters the path traversed in the trellis. In Viterbi decoding,
the trellis is formed in memory, where the metrics corresponding to every path are recorded. After constructing the
trellis for a suf?cient length (called the traceback length), the traceback is continued from the node having the mini-
mum path metric. This will lead to a stating node on the trellis. From this point one can trace forward and decode
the original sequence.
Figure 3 shows an example of convolutional encoding. In this example, each input symbol has two corresponding
output symbols, hence the encoding is called 1/2 rate convolutional encoding. To generate the output, the encoder
uses three values of the input signal, one present and two past. The set of past values of input data is called a
“state”. The number of input data values used to generate the code is called the constraint length. In this case, the
2
发布紧急采购，3分钟左右您将得到回复。
相关PDF资料
VTP110F
POLYSWITCH PTC RESET 1.1A STRAP
VTP175LF
POLYSWITCH PTC RESET 1.75A STRAP
VTP210GF
POLYSWITCH PTC RESET 2.1A STRAP
VTP210SF
POLYSWITCH PTC RESET 2.1A STRAP
W51-A121B1-10
CIRCUIT BREAKER THERM 10A ILLUM
W54-XC2A4B10-40
CIRCUIT BREAKER THERMAL 40AMP
WV-089047-10-9
LABEL ID PRODUCTS
XC6T-644
CONNECTR 64POS STRAIN RELIEF DIN
相关代理商/技术参数
VTESALLANF-155.520000
功能描述:155.52MHz LVPECL VCXO Oscillator Surface Mount 3.3V 100mA Enable/Disable 制造商:taitien 系列:VT 包装:剪带 零件状态:新产品 类型:VCXO 频率:155.52MHz 功能:启用/禁用 输出:LVPECL 电压 - 电源:3.3V 频率稳定度:±50ppm 工作温度:-40°C ~ 85°C 电流 - 电源（最大值）:100mA 等级:- 安装类型:表面贴装 大小/尺寸:0.276" 长 x 0.197" 宽（7.00mm x 5.00mm） 高度:0.075"（1.90mm） 封装/外壳:6-SMD，无引线（DFN，LCC） 电流 - 电源（禁用）（最大值）:- 标准包装:200
VTESFP4G
制造商:Promise Technologies 功能描述:SP.VTRAK.4GB SFP OPTICAL TRANSCEIVER.BOX - Bulk
VTEUALJANF-122.880000
功能描述:122.88MHz CMOS VCXO Oscillator Surface Mount 3.3V 40mA Enable/Disable 制造商:taitien 系列:VT 包装:剪带 零件状态:新产品 类型:VCXO 频率:122.88MHz 功能:启用/禁用 输出:CMOS 电压 - 电源:3.3V 频率稳定度:±50ppm 工作温度:-40°C ~ 85°C 电流 - 电源（最大值）:40mA 等级:- 安装类型:表面贴装 大小/尺寸:0.276" 长 x 0.197" 宽（7.00mm x 5.00mm） 高度:0.075"（1.90mm） 封装/外壳:6-SMD，无引线（DFN，LCC） 电流 - 电源（禁用）（最大值）:- 标准包装:200
VTEUALJANF-153.600000
功能描述:153.6MHz CMOS VCXO Oscillator Surface Mount 3.3V 40mA Enable/Disable 制造商:taitien 系列:VT 包装:剪带 零件状态:新产品 类型:VCXO 频率:153.6MHz 功能:启用/禁用 输出:CMOS 电压 - 电源:3.3V 频率稳定度:±50ppm 工作温度:-40°C ~ 85°C 电流 - 电源（最大值）:40mA 等级:- 安装类型:表面贴装 大小/尺寸:0.276" 长 x 0.197" 宽（7.00mm x 5.00mm） 高度:0.075"（1.90mm） 封装/外壳:6-SMD，无引线（DFN，LCC） 电流 - 电源（禁用）（最大值）:- 标准包装:200
VTEUALJANF-30.720000
功能描述:30.72MHz CMOS VCXO Oscillator Surface Mount 3.3V 20mA Enable/Disable 制造商:taitien 系列:VT 包装:剪切带（CT） 零件状态:新产品 类型:VCXO 频率:30.72MHz 功能:启用/禁用 输出:CMOS 电压 - 电源:3.3V 频率稳定度:±50ppm 工作温度:-40°C ~ 85°C 电流 - 电源（最大值）:20mA 等级:- 安装类型:表面贴装 大小/尺寸:0.276" 长 x 0.197" 宽（7.00mm x 5.00mm） 高度:0.075"（1.90mm） 封装/外壳:6-SMD，无引线（DFN，LCC） 电流 - 电源（禁用）（最大值）:- 标准包装:1
VTEUBLJANF-31.250000
功能描述:31.25MHz CMOS VCXO Oscillator Surface Mount 3.3V 20mA Enable/Disable 制造商:taitien 系列:VT 包装:剪切带（CT） 零件状态:新产品 类型:VCXO 频率:31.25MHz 功能:启用/禁用 输出:CMOS 电压 - 电源:3.3V 频率稳定度:±50ppm 工作温度:-40°C ~ 85°C 电流 - 电源（最大值）:20mA 等级:- 安装类型:表面贴装 大小/尺寸:0.276" 长 x 0.197" 宽（7.00mm x 5.00mm） 高度:0.075"（1.90mm） 封装/外壳:6-SMD，无引线（DFN，LCC） 电流 - 电源（禁用）（最大值）:- 标准包装:1
VTEUBLJANF-70.656000
功能描述:70.656MHz CMOS VCXO Oscillator Surface Mount 3.3V 30mA Enable/Disable 制造商:taitien 系列:VT 包装:剪带 零件状态:新产品 类型:VCXO 频率:70.656MHz 功能:启用/禁用 输出:CMOS 电压 - 电源:3.3V 频率稳定度:±50ppm 工作温度:-40°C ~ 85°C 电流 - 电源（最大值）:30mA 等级:- 安装类型:表面贴装 大小/尺寸:0.276" 长 x 0.197" 宽（7.00mm x 5.00mm） 高度:0.075"（1.90mm） 封装/外壳:6-SMD，无引线（DFN，LCC） 电流 - 电源（禁用）（最大值）:- 标准包装:200
VTEUMCJANF-19.440000
功能描述:19.44MHz CMOS VCXO Oscillator Surface Mount 3.3V 10mA Enable/Disable 制造商:taitien 系列:VT 包装:剪切带（CT） 零件状态:新产品 类型:VCXO 频率:19.44MHz 功能:启用/禁用 输出:CMOS 电压 - 电源:3.3V 频率稳定度:±50ppm 工作温度:-20°C ~ 70°C 电流 - 电源（最大值）:10mA 等级:- 安装类型:表面贴装 大小/尺寸:0.276" 长 x 0.197" 宽（7.00mm x 5.00mm） 高度:0.075"（1.90mm） 封装/外壳:6-SMD，无引线（DFN，LCC） 电流 - 电源（禁用）（最大值）:- 标准包装:1